SoC Design Platform

Overview

알파칩스는 자체 개발한 ADEON™ 자동화 플랫폼과 ALPRISC-V SoC 플랫폼을 기반으로 설계·검증부터 MPW 및 양산까지 통합된 SoC 개발 환경을 제공합니다. 플랫폼 기반의 자동화를 통해 설계 효율성과 품질을 높이고 안정적인 Silicon 구현을 지원합니다.

ASIC Business Flow

설계 자동화, 검증된 Design Flow 및 재사용 가능한 설계 자산을 기반으로 개발 기간을 단축하고 설계 생산성과 품질을 향상시키는 Platform Engineering 역량을 제공합니다.

ADEON™ Design Automation Platform: Design Environment Automation

Verification Environment Automation

Performance & Power Analysis

Foundry-ready Development Flow
ALPRISC-V SoC Development Platform: Open-source RISC-V Architecture

SoC Development Templates

RTL & Verification Asset Reuse

Rapid Prototyping Environment
One-Stop Development Ecosystem: Design → Verification → Bring-up → MPW → Production

Samsung Foundry Ecosystem Connectivity

Standardized Development Methodology

Accelerated Time-to-Market

Enhanced Silicon Success Rate

Solution

ADEON™ 기반의 설계·검증 자동화와 ALPRISC-V 기반의 재사용 가능한 SoC Platform을 통해 고객의 개발 환경에 최적화된 SoC Design Solution을 제공합니다.

설계 자동화와 표준화된 검증 환경을 통해 개발 효율성을 높이고 설계 품질 향상

Core Capabilities: Design Environment Automation

RTL Generation Support

SoC Top & IP Integration Management

Verification Environment Generation

Performance Analyzer

Power Analyzer

Foundry Integration Support
Value Proposition: Reduced Development Time

Early Error Detection

Standardized Development Environment

Improved Design Quality

Accelerated Time-to-Market

RISC-V 기반 SoC 개발 Platform을 통해 효율적인 반도체 설계 및 개발 지원

Core Capabilities: Open-source RISC-V Architecture

SoC Development Templates

RTL Auto Generation

Verification Scenario Templates

Reusable Design Assets
Value Proposition: Reduced Development Cost

Faster SoC Development

Lower IP Licensing Burden

Application-Scalable Platform Architecture

Expanded Accessibility to SoC Development

The ALPRISC-V platform provides a software execution environment alongside hardware templates.

Core Capabilities: Reference Boot Chain (BL1/BL2, U-Boot) for Platform Templates

Reference Linux BSP and Device Tree

Platform Validation Software Suite

FPGA-based Platform Evaluation Environment

Customization Support for Customer Silicon
Value Proposition: Software-ready Platform from Day One

Reduced Bring-up Schedule Risk

Verified HW/SW Integration Baseline

※ For detailed bring-up and BSP services, please refer to the [Silicon Bring-up & SW Enablement] page.

Design Applications

다양한 SoC 개발 환경과 Application에 적용 가능한 Platform을 통해 개발 기간 단축과 설계 자산의 재사용 및 효율적인 제품 개발을 지원합니다.