Design For Testability

Core 1: Comprehensive DFT Solution
Core 2: Optimized Test Coverage and Fault Detection
Core 3: From DFT Planning to Silicon Validation

Overview

Comprehensive
DFT Solution

알파칩스는 제품 품질 향상과 양산 수율 확보를 위한 종합적인 DFT(Design For Testability) 솔루션을 제공합니다. Scan Architecture 설계부터 ATPG, MBIST, SSN, JTAG 및 DFT Verification까지 검증된 방법론과 풍부한 프로젝트 경험을 바탕으로 높은 Test Coverage와 안정적인 양산 품질을 지원합니다.

ASIC Business Flow

Core Strengths & Capabilities

알파칩스는 다양한 공정과 SoC 개발 경험을 기반으로 제품 특성과 Test 요구사항에 최적화된 DFT 설계 및 검증 역량을 제공합니다.

Advanced DFT Methodology: Proven DFT Methodology

High Fault Coverage Optimization

Test Cost Reduction
Memory Test Solution: MBIST Architecture Design

Memory Repair Support

SRAM / Embedded Memory Test

Yield Improvement Methodology
Functional Safety DFT: Comprehensive Verification

ISO 26262-aware DFT Methodology

Safety Mechanism Verification

Reliability-oriented Test Strategy
Power-aware DFT: Low Power DFT Architecture

Scan Power Optimization

Power-aware ATPG

IR-aware Test Strategy
Production Quality Enhancement: Manufacturing Yield Improvement

Defect Reduction Strategy

Test Time Optimization

Stable Mass Production Support

Solution

DFT & Test Engineering Solutions

SoC 특성과 Test 요구사항을 기반으로 최적의 Test Architecture를 구현하고, 설계 검증부터 양산 Test까지 End-to-End Engineering Service를 제공합니다.

Scan Architecture

효율적인 Test와 높은 Fault Coverage 확보를 위해 SoC 설계에 최적화된 Scan Architecture를 설계합니다.

Core Capabilities: Scan Architecture Design

Scan Insertion

Compression Architecture

Scan Chain Optimization

Scan Verification

MBIST

Memory 불량 검출과 Test Coverage 향상을 위한 MBIST를 구현하여 안정적인 양산 품질을 지원합니다.

Core Capabilities: MBIST Architecture Design

Memory Test Algorithm

Memory Repair Support

Yield Enhancement

MBIST Verification

SCAN/SSN (Streaming Scan Network)

SSN 기반의 Scan Architecture를 적용하여 SoC Test Time과 Test Data Volume을 효율적으로 절감합니다.

Core Capabilities: SSN Architecture Design

Streaming Interface Integration

Test Data Volume Reduction

Multi-core Parallel Test

ATE Bandwidth Optimization

ATPG

High Fault Coverage와 Test 효율성 확보를 위한 ATPG Pattern을 생성하고 검증합니다.

Core Capabilities: ATPG Pattern Generation

Fault Coverage Analysis

Stuck-at Fault Testing

Transition Fault Testing

Bridging Fault Testing

Pattern Optimization

JTAG & Boundary Scan

JTAG 및 Boundary Scan을 구현하여 Chip Debugging과 Board-Level Connectivity Test를 지원합니다.

Core Capabilities: IEEE 1149.1 Support

JTAG Implementation

Boundary Scan Design

Board-level Test Support

Debug Interface Design

DFT Verification

DFT 구조와 Test Logic을 검증하여 DFT 구현의 정확성과 Test 신뢰성을 확보합니다.

Core Capabilities: DFT Simulation

Pattern Verification

Equivalence Check

DFT STA

Coverage Analysis

Functional Safety DFT

Automotive 및 Safety-Critical Application의 Functional Safety 요구사항을 고려한 DFT 설계 및 검증을 지원합니다.

Core Capabilities: Functional Safety Support

ISO 26262 Methodology

Safety-aware DFT Design

In-system Test Strategy

Reliability Verification

Design Applications

Supported Applications

알파칩스의 DFT 솔루션은 높은 Test Coverage, Test Cost 최적화 및 안정적인 양산 품질을 기반으로 다양한 반도체 Application을 지원합니다.

AI SoC
Automotive SoC
Consumer Electronics
High-performance Computing
Industrial Semiconductor